Abstract
Interconnection Network is the key component of the digital system. The numbers of cores are increasing on the single chip, which led to the introduction of layered based concept in the System on Chips. Various topologies suggested in the past were based on the 3-dimensional layouts. In this paper, we have proposed using the modified Diagonal mesh topology for defining the single layer of the topology. The proposed topology has been tested on the various traffic patterns like a uniform, bit complement, neighbor, tornado, bit traversal and bit reversal traffic. The performance of the proposed topology was better in the bit reversal traffic. The topology was found to be comparable to other three-dimensional topologies on the uniform, and tornado traffic. The performance of the topology was less in comparison to other topologies in the case of other traffic. Based on the analysis of results it can be observed, we can use the topology in the applications where traffic is following the pattern of the form bit reversal.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1-6 |
| Number of pages | 6 |
| Journal | Journal of Telecommunication, Electronic and Computer Engineering |
| Volume | 9 |
| Issue number | 3-6 |
| State | Published - Jan 1 2017 |
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Keywords
- Latency
- Mesh Interconnection Network
- Network Traffics
- Throughput
ASJC Scopus subject areas
- Hardware and Architecture
- Computer Networks and Communications
- Electrical and Electronic Engineering
Cite this
Three-dimensional topology based on modified diagonal mesh interconnection network. / Punhani, Akash; Kumar, Pardeep; Nitin, Nitin.
In: Journal of Telecommunication, Electronic and Computer Engineering, Vol. 9, No. 3-6, 01.01.2017, p. 1-6.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Three-dimensional topology based on modified diagonal mesh interconnection network
AU - Punhani, Akash
AU - Kumar, Pardeep
AU - Nitin, Nitin
PY - 2017/1/1
Y1 - 2017/1/1
N2 - Interconnection Network is the key component of the digital system. The numbers of cores are increasing on the single chip, which led to the introduction of layered based concept in the System on Chips. Various topologies suggested in the past were based on the 3-dimensional layouts. In this paper, we have proposed using the modified Diagonal mesh topology for defining the single layer of the topology. The proposed topology has been tested on the various traffic patterns like a uniform, bit complement, neighbor, tornado, bit traversal and bit reversal traffic. The performance of the proposed topology was better in the bit reversal traffic. The topology was found to be comparable to other three-dimensional topologies on the uniform, and tornado traffic. The performance of the topology was less in comparison to other topologies in the case of other traffic. Based on the analysis of results it can be observed, we can use the topology in the applications where traffic is following the pattern of the form bit reversal.
AB - Interconnection Network is the key component of the digital system. The numbers of cores are increasing on the single chip, which led to the introduction of layered based concept in the System on Chips. Various topologies suggested in the past were based on the 3-dimensional layouts. In this paper, we have proposed using the modified Diagonal mesh topology for defining the single layer of the topology. The proposed topology has been tested on the various traffic patterns like a uniform, bit complement, neighbor, tornado, bit traversal and bit reversal traffic. The performance of the proposed topology was better in the bit reversal traffic. The topology was found to be comparable to other three-dimensional topologies on the uniform, and tornado traffic. The performance of the topology was less in comparison to other topologies in the case of other traffic. Based on the analysis of results it can be observed, we can use the topology in the applications where traffic is following the pattern of the form bit reversal.
KW - Latency
KW - Mesh Interconnection Network
KW - Network Traffics
KW - Throughput
UR - http://www.scopus.com/inward/record.url?scp=85039798307&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85039798307&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:85039798307
VL - 9
SP - 1
EP - 6
JO - Journal of Telecommunication, Electronic and Computer Engineering
JF - Journal of Telecommunication, Electronic and Computer Engineering
SN - 2180-1843
IS - 3-6
ER -